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Optimized Sliding Mode Control of Three-Phase Four-Switch Inverter BLDC Motor Drive Using LFD Algorithm
Author(s) -
Quasy S. Kadhim,
Abbas H. Abbas,
Mohammed Moanes E. Ali
Publication year - 2021
Publication title -
iraqi journal for electrical and electronic engineering/al-maǧallaẗ al-ʻirāqiyyaẗ al-handasaẗ al-kahrabāʼiyyaẗ wa-al-ilikttrūniyyaẗ
Language(s) - English
Resource type - Journals
eISSN - 2078-6069
pISSN - 1814-5892
DOI - 10.37917/ijeee.17.2.15
Subject(s) - control theory (sociology) , inverter , electronic speed control , overshoot (microwave communication) , pid controller , controller (irrigation) , motor drive , computer science , torque , engineering , voltage , control engineering , control (management) , physics , temperature control , mechanical engineering , telecommunications , agronomy , artificial intelligence , electrical engineering , biology , thermodynamics
This paper presents a low-cost Brushless DC (BLDC) motor drive system with fewer switches. BLDC motors are widely utilized in variable speed drives and industrial applications due to their high efficiency, high power factor, high torque, low maintenance, and ease of control. The proposed control strategy for robust speed control is dependent on two feedback signals which are speed sensor loop which is regulated by Sliding Mode Controller (SMC) and current sensor loop which is regulated by Proportional-Integral (PI) for boosting the drive system adaptability. In this work, the BLDC motor is driven by a four-switch three-phase inverter emulating a three-phase six switch inverter, to reduce switching losses with a low complex control strategy. In order to reach a robust performance of the proposed control strategy, the Lévy Flight Distribution (LFD) technique is used to tune the gains of PI and SMC parameters. The Integral Time Absolute Error (ITAE) is used as a fitness function. The simulation results show the SMC with LFD technique has superiority over conventional SMC and optimization PI controller in terms of fast-tracking to the desired value, reduction speed error to the zero value, and low overshoot under sudden change conditions.

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