
Coding-Decoding Ternary Logic
Author(s) -
Rawnaq Habeeb
Publication year - 2014
Publication title -
iraqi journal for electrical and electronic engineering/al-maǧallaẗ al-ʻirāqiyyaẗ al-handasaẗ al-kahrabāʼiyyaẗ wa-al-ilikttrūniyyaẗ
Language(s) - English
Resource type - Journals
eISSN - 2078-6069
pISSN - 1814-5892
DOI - 10.37917/ijeee.10.1.3
Subject(s) - ternary operation , decoding methods , binary number , logic family , computer science , logic gate , algorithm , arithmetic , logic synthesis , digital electronics , theoretical computer science , electronic engineering , mathematics , electrical engineering , programming language , engineering , electronic circuit
In this paper ternary logic is encoded into binary and certain processes were conducted on binary logic after which the binary is decoded to ternary. General purpose digital devices were used and the circuit is designed back to front starting from ternary logic provided by transistor pairs at output side back to front end. This provided easier design technique in this particular paper. Practical and simulation results are recorded.