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Performance Improvement of Prediction-Based Parallel Gate-Level Timing Simulation Using Prediction Accuracy Enhancement Strategy
Author(s) -
Seiyang Yang
Publication year - 2016
Publication title -
kips transactions on computer and communication systems
Language(s) - English
Resource type - Journals
eISSN - 2734-049X
pISSN - 2287-5891
DOI - 10.3745/ktccs.2016.5.12.439
Subject(s) - bottleneck , computer science , overhead (engineering) , performance prediction , synchronization (alternating current) , parallel computing , simulation , embedded system , computer network , channel (broadcasting) , operating system

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