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Design of a Linear LNA for 5G Applications using 45 nm Technology
Author(s) -
Rashmi Hazarika,
Manash Pratim Sharma
Publication year - 2021
Publication title -
wseas transactions on communications/wseas transactions on communications
Language(s) - English
Resource type - Journals
eISSN - 2224-2864
pISSN - 1109-2742
DOI - 10.37394/23204.2021.20.17
Subject(s) - linearity , inductor , low noise amplifier , amplifier , noise figure , common gate , electronic engineering , transistor , electrical engineering , computer science , engineering , voltage , cmos
A low noise amplifier (LNA) plays a very significant role in communication systems. Despite having a good amplification of the signal it must offer other attributes like noise figure, linearity etc for making the communication system more robust. With the advent of 5G communication, the requirement of a high BW LNA is becoming important. This paper presents the design of a LNA which have a common gate input configuration, an active inductor in place of a passive inductor, common drain amplifier at the output stage and a linearity circuit. Common gate amplifier offers a good voltage amplification while the common drain stage enhances the stability. The active inductor facilitates reduction of the die area paving the way for a cost efficient structure. This proposed design achieves a gain of 15.17dB with substantial enhancement of linearity. A good noise figure of 7dB is obtained while using 11 transistors and eliminating the need of passive inductors. The peak gain is achieved at 3.5GHz

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