Open AccessIn-Pixel CTIA & Readout Circuitry for an Active CMOS Image Sensor
Author(s) -
Aicha Menssouri,
Karim El Khadiri,
Ahmed Tahiri
Publication year - 2021
Publication title -
wseas transactions on systems and control/wseas transactions on systems and control
Language(s) - English
Resource type - Journals
eISSN - 2224-2856
pISSN - 1991-8763
DOI - 10.37394/23203.2021.16.58
Subject(s) - pixel , cmos , correlated double sampling , transimpedance amplifier , image sensor , phase margin , reset (finance) , transistor , amplifier , cmos sensor , operational amplifier , voltage , physics , electrical engineering , computer science , optoelectronics , engineering , optics , financial economics , economics
This work aims to design and simulate an in-pixel Capacitive Transimpedance Amplifier (CTIA) and peripheral circuitry that ensures pixel reading. Each pixel circuit is composed of four transistors using 90nm CMOS technology with a supply voltage of 1.8 V and is part of an array of pixels that make up a CMOS image sensor with peripheral circuitry. Pixel output is sent to a delta difference sampling (DDS) circuit to filter reset voltages. The Gain Margin achieved for the in-pixel CTIA is 44dB and 91dB for the Phase Margin. We also present measured pixel parameters and give a comparison with prior work. The timing and readout circuitry is also described.