FPGA-based Joint Design of LDPC Encoder and Decoder
Author(s) -
Ruijia Yuan,
Baoming Bai
Publication year - 2012
Publication title -
journal of electronics information technology
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.191
H-Index - 27
ISSN - 1009-5896
DOI - 10.3724/sp.j.1146.2011.00539
Subject(s) - encoder , field programmable gate array , low density parity check code , computer science , joint (building) , parallel computing , computer hardware , decoding methods , computer architecture , embedded system , algorithm , engineering , operating system , architectural engineering
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