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Giga-Scale Integration System-On-A-Chip Design: Challenges and Noteworthy Solutions
Author(s) -
Ishtiaq Ahammad,
Md. Ashikur Rahman Khan,
Md. Saifur Rahman,
Tanvir Zaman Khan,
Nishu Nath
Publication year - 2020
Publication title -
international journal of recent technology and engineering
Language(s) - English
Resource type - Journals
ISSN - 2277-3878
DOI - 10.35940/ijrte.f7225.038620
Subject(s) - reuse , system on a chip , system integration , systems engineering , integrated circuit design , embedded system , computer science , scale (ratio) , integrated circuit , electronic design automation , physical design , integrated design , systems design , circuit design , computer architecture , engineering , physics , civil engineering , quantum mechanics , waste management , operating system
In all respects of the last five decades, integrated circuit technology has advanced at exponential rates in both productivity and performance. Giga-Scale Integration (GSI) System-On-A-Chip (SoC) designs have become one of the main drivers of the integrated circuit technology in recent years. The objective of this work is to understand the challenges of Giga-scale SoC integration in nanometer technologies, and identify promising conveniences for innovation. Physical designs are crucial for SoC integration and in our work we identify them with details. In future the couplings and interactions among system components will increase as we put more of the system on a silicon die. Therefore the system designers will face challenges in several areas and we describe these future challenges briefly. Developing a design driver for GSI SoC design is important. With the help of this design driver we provide the design methodology, which ensures the high performance of the design. We present two noteworthy solutions which overcome the challenges of GSI SoC design. One is reuse and integration and another is efficient bus architecture. We also provide the challenges for verification of GSI SoC and methods to overcome these challenges.

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