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An Energy Efficient Binary Magnitude Comparator for Nanotechnology Applications
Author(s) -
Divya Tripathi,
Subodh Wairya
Publication year - 2020
Publication title -
international journal of recent technology and engineering
Language(s) - English
Resource type - Journals
ISSN - 2277-3878
DOI - 10.35940/ijrte.f7000.038620
Subject(s) - comparator , cmos , dissipation , microelectronics , scaling , computer science , binary number , magnitude (astronomy) , energy consumption , electronic engineering , quantum dot cellular automaton , power (physics) , cellular automaton , electrical engineering , physics , mathematics , algorithm , voltage , engineering , arithmetic , quantum mechanics , geometry , astronomy
Quantum-dot cellular automata (QCA) is inventive nanotechnology that suggest lesser size, lesser power consumption, with more rapid speeds and deliberated as a clarification to the scaling difficulties with CMOS technology. Physical bounds of CMOS for instance the effects of quantum and the limits of technologies like power dissipation obstruct the motion of microelectronics using consistent circuit scaling. In this paper, a 1-bit binary magnitude comparator circuit is proposed that takes down the count of QCA cells related to the previously reported design’s cell numbers. The proposed course of study involves just around 29 % of the total area as compared to the preceding design with the lesser speed and clocking cycle performance and energy dissipation also. QCA designerE tool is used for simulation and finding the parameters also. The projected magnitude comparator also compares the metrics result with some of the other preceeding patterns.

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