Open AccessImplementation of AMBA Based AHB2APB Bridge
Author(s) -
Bhagvati Panchal,
Yogesh Parmar,
Haresh A. Suthar
Publication year - 2020
Publication title -
international journal of recent technology and engineering
Language(s) - English
Resource type - Journals
ISSN - 2277-3878
DOI - 10.35940/ijrte.e6908.038620
Subject(s) - computer science , embedded system , verilog , system bus , bridge (graph theory) , control bus , local bus , reusability , controller (irrigation) , can bus , arbiter , field programmable gate array , computer hardware , computer architecture , operating system , software , medicine , agronomy , biology
The Advance Micro controller Bus Architecture bus protocol is used to build high performance SoC designs (system on chip). This achieves communication through the connection of different functional blocks ( or IP ). By using multiple controllers and peripherals, it makes possible to develop multiprocessor unit. It provides reusability of IP of different buses of AMBA, which can reduce the communication gap between high performance buses and low speed buses. To perform high-speed pipelined data transfers, AMBA based embedded system becomes a demanding hypothesis analytical wise, by using different bus signals supported by AMBA. To synthesize as well as simulate the composite annexation which connects advance high performance bus and advance peripheral bus which known as AHB2APB Bridge in addition to no data loss during transfer is the main target of this work. Implementation of bridge module is designed in Verilog HDL and functional and timing simulation of bridge module are done on a platform of Xilinx.