Open AccessDesign of 8-Bit ALU Design using GDI Techniques with Less Power and Delay
Author(s) -
Harshmaniyadav Panwar,
Harshmani Yadav,
Uday Panwar
Publication year - 2019
Publication title -
international journal of recent technology and engineering
Language(s) - English
Resource type - Journals
ISSN - 2277-3878
DOI - 10.35940/ijrte.d9544.118419
Subject(s) - adder , 4 bit , computer science , 32 bit , power (physics) , transistor , cmos , bit (key) , subthreshold conduction , voltage , electronic engineering , computer hardware , electrical engineering , engineering , physics , computer security , quantum mechanics
Arithmetic Logic Unit (ALU) is a substantial fragment of microchip. Cutting-edge computerized processors, legitimate and math activity accomplishes making use of ALU. This paper depicts an 8-Bit ALU operating with a lowest power 11-Transistor Full Adder (11-T FA) and Gate dispersion input (GDI) centered MUX. All structures were simulated using Tanner EDA software version-15 with 32 nanometer BSIM4 innovation. Execution examinations were furnished as for voltage, power, postponement and power delay item. In this paper 8-bit ALU operated in subthreshold region, selected 0.7 VDD for maintain the both power as well as delay. In 8-bit ALU of GDI proposed model, less than 82% power consumption reduced as compare with CMOS 8-Bit ALU due to voltage level improvement.