
VLSI Architecture of Cubic SP line Interpolation on FPGA
Author(s) -
Jayakumar Chandrasekaran,
J. Sangeetha
Publication year - 2019
Publication title -
international journal of recent technology and engineering
Language(s) - English
Resource type - Journals
ISSN - 2277-3878
DOI - 10.35940/ijrte.d8351.118419
Subject(s) - spline interpolation , field programmable gate array , interpolation (computer graphics) , computer science , algorithm , architecture , envelope (radar) , very large scale integration , signal processing , cubic function , monotone cubic interpolation , mathematics , computer hardware , polynomial interpolation , digital signal processing , artificial intelligence , embedded system , bilinear interpolation , mathematical analysis , computer vision , telecommunications , geography , motion (physics) , radar , archaeology
A novel time frequency analysis method was proposed by N.E.Huang known as Hilbert Huang Transform which, can be used for analyzing and processing real world signals. The Intrinsic Mode Functions (IMF) is the key part of this algorithm, in this part the empirically decomposed signal data points uses the cubic spline interpolation for connecting maximum and minimum points to connect lower and upper envelope of the processed signal. This paper presents the real time architecture for hardware implementation of natural cubic spline interpolation. The architecture of proposed cubic spline is using the properties of continuous cubic and linear polynomials. The experimental results showed that our proposed architecture gets better result than previous proposal implemented on Spartan 6 based FPGA board.