Open AccessLow Power Design of 0.8V based 8 Bit Content Addressable Memory using MSML implemented in 22nm Technology for Aeronautical Applications
Author(s) -
G. Balaji,
M Karthiga,
D Swetha,
M Suchitra
Publication year - 2019
Publication title -
international journal of recent technology and engineering
Language(s) - English
Resource type - Journals
ISSN - 2277-3878
DOI - 10.35940/ijrte.b1329.0982s1119
Subject(s) - spice , computer science , line (geometry) , power (physics) , power consumption , computer hardware , embedded system , electronic engineering , engineering , physics , geometry , mathematics , quantum mechanics
Proposed Paper contains Master slave match line (MSML) architecture which is implemented in traditional Content Addressable Memory (CAM) cell for storing 8 bit of data. Objective of the proposed methodology is to improve searching speed with less power consumption. MSML operation depends on two things one is Master Match Line (MML) and slave match line (SML). Design is performed using SPICE in 22nm technology which is weightless and can be used in Aeronautical Equipment. Various parameters such as temperature, power and delay are calculated for various types of CAM cell. Proposed methodology power consumption is found to be 598mw with delay of 5.98ns for 22nm technology.