
Performance Parameters of 3 Value 8t Cntfet Based Sram Cell Design using H-Spice
Publication year - 2019
Publication title -
international journal of recent technology and engineering
Language(s) - English
Resource type - Journals
ISSN - 2277-3878
DOI - 10.35940/ijrte.b1005.0782s519
Subject(s) - carbon nanotube field effect transistor , static random access memory , spice , computer science , cmos , logic gate , transistor , electronic engineering , voltage , field effect transistor , electrical engineering , computer hardware , engineering , algorithm
this paper presents a design of a 3ValueLogic 9T memory cell using carbon nano-tube field-effect transistors (CNTFETs). The carbon nano tubes with their superior transport properties, excellent current capabilities ballistic transport operation, 3-value logic have been proposed for 8T SRAM cell implementation in CNTFET technology. The CNTFET design to achieves the different threshold voltages. And it also avoids the usage of additional power supplies. The channel length used here is 18nm wide. The power consumption is reduced, as there is absence of stand-by power dissipation. Second order effects are removed by using CNTFET. In a 3 Value Logic, it only takes log3 (2n) bits to represent an n-bit binary number. In 3Value logic 9T memory cell based CNTFET have been developed and extensive HSPICE simulations have been performed in realistic environments. CNTFET 9T based SRAM cell proves which is Dynamic power better than CNTFET, based 3value logic 8T SRAM cell as well as CMOS SRAM cell.