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Power Quality Event Detection and Classifier Architecture on FPGA for Smart M eters
Author(s) -
Prathibha. E*,
Hinsermu Alemayehu,
A. Manjunatha
Publication year - 2020
Publication title -
international journal of recent technology and engineering
Language(s) - English
Resource type - Journals
ISSN - 2277-3878
DOI - 10.35940/ijrte.a3027.059120
Subject(s) - field programmable gate array , interfacing , reconfigurability , computer science , complex event processing , computer hardware , reconfigurable computing , embedded system , event (particle physics) , real time computing , telecommunications , physics , process (computing) , quantum mechanics , operating system
Smart meters have been developed to capture PQ events, detect the event, compress events and characterize events. The events are stored in local memory of smart meter as well are transmitted over communication channel. The smart meter hardware that performs complex signals processing activity such as event detection, classification and compression need to be implemented on reconfigurable platforms. FPGAs are used in smart meters as they support reconfigurability and also has inbuilt memory modules, processor modules and additional features for interfacing. High speed low power area efficient architectures for computation of Dual Tree Complex Wavelet Transform (DTCWT).

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