Open AccessCompact QCA based JK Flip-Flop for Digital System
Author(s) -
B. S. Premananda,
S. Soundarya,
Chaitra Dechamma K.S.
Publication year - 2019
Publication title -
international journal of innovative technology and exploring engineering
Language(s) - English
Resource type - Journals
ISSN - 2278-3075
DOI - 10.35940/ijitee.l3074.1081219
Subject(s) - quantum dot cellular automaton , electronic circuit , flip flop , computer science , cmos , digital electronics , cellular automaton , electronic engineering , reduction (mathematics) , sequential logic , energy (signal processing) , logic gate , algorithm , electrical engineering , mathematics , engineering , statistics , geometry
Considering the roadmap of silicon, the high rate of shrinkage in dimensions of typical MOS circuits, genuine difficulties endanger this innovation. A quantum-dot cellular automaton (QCA) is an outstanding and conceivable answer for substitution of CMOS technology. Sequential circuits contain combinational circuits and memory elements which store binary information. Latches and Flip-flop circuits are the basic components of computerized circuits, along these lines. The area and energy of the sequential circuits has to be minimal for speed applications. Traditional implementation of JK flip-flop circuits requires more cells and consumes more energy. This paper proposes a compact and low energy JK Flip-flop, designed in CAD tool, QCADesigner. Analysis of energy was performed using the CAD tool, QCADesigner-E. The experimental results obtained in the proposed paper demonstrate the reduction in the cell count which in turn brings down the complexity of the circuit when compared to the reference QCA based JK Flip-flop circuits and it also shows a reduction in energy and area.