Open AccessImplementation of Montgomery Multiplier using Scalable Architecture
Publication year - 2019
Publication title -
international journal of innovative technology and exploring engineering
Language(s) - English
Resource type - Journals
ISSN - 2278-3075
DOI - 10.35940/ijitee.k1178.09811s19
Subject(s) - scalability , multiplier (economics) , computer science , computation , architecture , computer architecture , parallel computing , arithmetic , multiplication (music) , computer hardware , programming language , mathematics , operating system , art , combinatorics , economics , visual arts , macroeconomics
This paper describes the methodology and design of a scalable Montgomery multiplication module. This multiplier can manipulate any number of bits without any limitation. The size of a word depends upon the area which is available and also the performance which is required. After the general architecture is described, hardware organization is analyzed for implementing parallel computation and the discussions on design tradeoffs are done for recognising best configuration for hardware.