
Optimized S-box and Mix-Columns for AES Architecture for live IP video Encryption and Decryption by Key Generation Through face Recognition
Author(s) -
Jayanthi K Murthy,
N S Sneha
Publication year - 2019
Publication title -
international journal of innovative technology and exploring engineering
Language(s) - English
Resource type - Journals
ISSN - 2278-3075
DOI - 10.35940/ijitee.j1106.0881019
Subject(s) - computer science , lookup table , encryption , advanced encryption standard , pipeline (software) , field programmable gate array , encryption software , key (lock) , table (database) , aes implementations , computer hardware , embedded system , computer architecture , computer network , 40 bit encryption , operating system , disk encryption , data mining
This paper proposes an AES based Encryption and Decryption of a live IP video used for security in surveillance systems. Here, the key is generated based on neural networks techniques for facial recognition. Principal component analysis and Eigen vector algorithms are used to extract biometric facial features which are used to train the neural network. At the receiver side, the original video plays only if the user is authenticated or else it plays an encrypted video. This work proposes an AES architecture based on optimizing timing in terms of adding inner and outer pipeline registers for each round and Key Expansions. Further by optimizing the Crypto Multiplication for Mix columns via LUT based approach aid in further optimization in terms of timing. LUT and Pipelined based implementation techniques are optimal for FPGA based implementations. ROM table and pipelining are the two techniques used to implement AES. Result indicates that with the combination of pipelined architecture and Distributed/Split LUTPipelined techniques, the encryption has higher throughput and speed