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Techniques for Sigma Delta ADC Design using CMOS Technology for CODEC
Publication year - 2019
Publication title -
international journal of innovative technology and exploring engineering
Language(s) - English
Resource type - Journals
ISSN - 2278-3075
DOI - 10.35940/ijitee.i1003.0789s219
Subject(s) - delta sigma modulation , integrator , cmos , electronic engineering , codec , computer science , successive approximation adc , measure (data warehouse) , filter (signal processing) , sigma , engineering , physics , electrical engineering , computer hardware , voltage , capacitor , telecommunications , bandwidth (computing) , database , quantum mechanics
This paper presents the careful study of sigma-delta analog to digital convertor. The operations, characterizing parameters and totally different structures projected square measure conferred in basic type. the varied techniques and strategies for the design of a CMOS 3rd order Continuous Time (CT) Sigma Delta (SD) Modulator, where in to enhance the gain of the loop filter and to avoid the loading effect of the succeeding stage, facile differential pairs square measure enclosed between the passive RC integrators. then the ADC are optimized victimization Genetic Algorithms so as to realize the nice exchange between RC variations and loop stability.This makes SD-ADC more advantageous compared to conventional converters, that makes possible to use this SD-ADC in bio-medical applications

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