Open AccessEluding Side Channel Attacks by using Masking 128Bit AES Design
Author(s) -
. Pallavi,
S.Anil Nagendra,
D. Uma
Publication year - 2020
Publication title -
international journal of innovative technology and exploring engineering
Language(s) - English
Resource type - Journals
ISSN - 2278-3075
DOI - 10.35940/ijitee.h6732.069820
Subject(s) - side channel attack , advanced encryption standard , computer science , cryptography , power analysis , aes implementations , field programmable gate array , lookup table , masking (illustration) , block cipher , algorithm , embedded system , encryption , computer security , art , programming language , visual arts
Advanced encryption standard is detailing for data crypto graphing. The algorithm used universally for cryptography and secure data transmission, the algorithm puissant to intruders, who often attack via side channels. One of the observed attacks was estimate the power implanted in AES core and processed probable scrutinizing to guess the key on multiple iterations. So in order to elude side channel attacks and reduce power consumed in AES standard, design proposed with masking and pipeline scheme. This design helps in shrinking power consumption as compare to AES algorithm and upgrade to withstand from attacks. Another major improvement in the design is LUT’s used for masking and original algorithm almost equal, area phenomenon also solved out. The proposed algorithm implemented in VERTEX-7 FPGA board and simulated using Xilinx Vivado 2015.2 and Modelsim.