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A Versatile Design of Low Power and High-Speed Operational Amplifier using Nano Scale Transistors
Author(s) -
P. Asharani*,
M. C. Chinnaaiah,
T. Keerthi,
Toopalli Sirisha,
Sanjay Dubey
Publication year - 2020
Publication title -
international journal of innovative technology and exploring engineering
Language(s) - English
Resource type - Journals
ISSN - 2278-3075
DOI - 10.35940/ijitee.e2545.039520
Subject(s) - phase margin , amplifier , transistor , spice , biasing , dissipation , electrical engineering , electronic engineering , operational amplifier , current feedback operational amplifier , power (physics) , bandwidth (computing) , operational transconductance amplifier , computer science , engineering , voltage , cmos , physics , telecommunications , quantum mechanics , thermodynamics
This paper illustrates the design of low power and high-speed operational Amplifier using Nanoscale Transistors. The proposed design introduces biasing block, for generating I=10uA for Channel length=180nm Technology. Adding biasing block to two-stages operational Amplifier current is constant i.e. there are no fluctuations in power supply, increase in bandwidth and power dissipation is less as compared the previous result. The design is simulated in p-spice tool and performed AC analysis. After analysis, the design achieved the parameter like Gain = 40db, Phase Margin=90º, Unity Gain Band Width=13MHz, Output Swing=0.1v to 1.7v and Power Dissipation=0.145mW.

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