Open AccessDesign and Implementation of 802.15.4 Transceiver for Wireless Personal Area Networks (WPANs) on FPGA
Author(s) -
Guruprasad S.P*,
Chandrasekar B.S
Publication year - 2020
Publication title -
international journal of innovative technology and exploring engineering
Language(s) - English
Resource type - Journals
ISSN - 2278-3075
DOI - 10.35940/ijitee.c8926.019320
Subject(s) - transceiver , field programmable gate array , computer science , ieee 802.11b 1999 , wireless , chip , phase shift keying , computer hardware , ieee 802.15 , ieee 802.11g 2003 , embedded system , offset (computer science) , synchronization (alternating current) , wireless network , channel (broadcasting) , computer network , bit error rate , ieee 802.11 , telecommunications , programming language
The IEEE 802.15.4 standard provides mainly accessing, monitoring, and controlling capability of the Wireless devices. This standard supports short-range wireless communications and Low Rate (LR) - Wireless Personal Area Networks (WPANs). This manuscript presents the fully integrated digital 802.15.4 Transceiver, which suitable to ZigBee Device Standard at 2.4GHz range. The 802.15.4 Transceiver design includes an 8-bit input data sequence mapped to lower and Upper Symbols followed by Chip-sequence conversion as per the IEEE standard. The chip sequences are mapped separately as even and odd sequences used for the Offset-QPSK Modulation. The chip synchronization achieved by using a proper clocking mechanism on the receiver side. The 802.15.4 Transceiver design is implemented on Artix-7 FPGA using Xilinx Environment. The hardware constraints like Area (Slices), Frequency, and Power are analyzed. The proposed work also compared with existing similar approaches with more significant improvements in chip area and Power.