Open AccessHardware-Based Physical Layer Security Solutions and Algorithms for Iot Devices on FPGA Platform
Author(s) -
R Bharathi,
N. Parvatham
Publication year - 2020
Publication title -
international journal of innovative technology and exploring engineering
Language(s) - English
Resource type - Journals
ISSN - 2278-3075
DOI - 10.35940/ijitee.c8752.019320
Subject(s) - eavesdropping , computer science , encryption , field programmable gate array , physical layer , cryptography , embedded system , latency (audio) , application layer , internet of things , throughput , advanced encryption standard , computer network , computer security , wireless , operating system , telecommunications , software deployment
The Physical Layer Security mechanism has emerged as a powerful concept that can provide high-level security and can even replace encryption oriented schemes, which necessitate various difficulties and practical challenges for future communication systems (e.g., IoT). Therefore, the critical goal of this work is to enhance the security performance at IoT and prevent the network from various eavesdropping attacks. In this Manuscript, analyze the hardware-based Physical Layer Security solutions and suitable cryptographic Algorithms for IoT applications. The Cryptographical Algorithms include AES, DES, Light Encryption Devices (LED), PRESENT, Extended Tiny Encryption Device (XTEA) are analyzed on the Hardware platform. The Hardware constraints like Area, Frequency, Latency Throughput, and efficiency are evaluated on FPGA devices.