Open AccessMemristor: A Unique Discovery for Reducing Power
Author(s) -
Vartika Pandey,
Manisha Pattaniak,
R.K. Tiwari
Publication year - 2020
Publication title -
international journal of innovative technology and exploring engineering
Language(s) - English
Resource type - Journals
ISSN - 2278-3075
DOI - 10.35940/ijitee.c8171.029420
Subject(s) - memristor , static random access memory , leakage (economics) , transistor , process variation , power (physics) , leakage power , cmos , dynamic demand , electronic engineering , computer science , electrical engineering , power semiconductor device , process (computing) , engineering , voltage , physics , quantum mechanics , economics , macroeconomics , operating system
A Process parameter variation has increasing, which results unpredictable device behaviour, due to occurrence of deep submicron CMOS technology. As the time passage this issue is exasperated by low power requirements which are approaching transistor operation into sub threshold regime. Principally for portable devices efficient, capable and process variation amiable memory is the most demandable in the market. In designing of low power memories, leakage power is observant parameter to design low power devices, because leakage power plays a dominant role in the total power utilization of the devices. In this paper, simple 6T SRAM formed with memristor has compared with the technique based 6T SRAM for the various parameters like total power and leakage power