
Approximate Reverse Carry Propagate Adder for Energy-Efficiency
Author(s) -
Inumula Veeraraghava Rao,
M. Aditya,
K. Sai Priyanka,
S. Sai Rahul,
Pallavi Reddy
Publication year - 2019
Publication title -
international journal of innovative technology and exploring engineering
Language(s) - English
Resource type - Journals
ISSN - 2278-3075
DOI - 10.35940/ijitee.a4933.129219
Subject(s) - adder , carry (investment) , carry save adder , serial binary adder , computation , computer science , power (physics) , arithmetic , propagation delay , transistor count , transistor , energy consumption , power consumption , electronic engineering , mathematics , algorithm , electrical engineering , telecommunications , engineering , voltage , computer network , physics , finance , quantum mechanics , economics , latency (audio)
The hypothesis of estimated measure is to design computation quality for computation efforts. The Approximate full adders (AFA’s) are the lead objective to reduce the length of carry propagation which is put through to the slightest error rate. Approximate adder comes up with important enhancement in delay, area and power. The developing attribute is carry doesn't propagate in it. So in this we mainly use the hybrid adders where it utilizes the RCPFA. The approximate adder generates the input carry from higher bit to lower bit to produce carry output, , the weight of the carry reduces when it generates. In Reverse Carry Propagate Adder there are accomplishments to be completed those are the power, delay and energy. So, compared to the conventional ones the Approximate Mirror Adders (AMA's) has less transistors compared to it. This is to establish on the internal structure of the mirror adder which consumes less area and power consumption as well as higher speed. The representation performed by the RCPFA and hybrid adders is observed and compared using Mentor Graphics. As a result, it consists of higher accuracies and specifies that, by working on the RCPFA in the hybrid adders can consists of improved consumption of area by 14%, consumption of power by 19.2%, consumption of delay by 27%