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Implementation of Audio CODEC with a Novel Design Methodology
Author(s) -
Raghavendra Rao,
Mrs. A. S. Keerthi Nayani,
M Aruna,
Mr. A. Abhishek Reddy
Publication year - 2019
Publication title -
international journal of innovative technology and exploring engineering
Language(s) - English
Resource type - Journals
ISSN - 2278-3075
DOI - 10.35940/ijitee.a4823.119119
Subject(s) - digital signal processing , codec , computer science , delta sigma modulation , computer hardware , digital signal processor , signal processing , floating point , analog signal , electronic engineering , embedded system , engineering , bandwidth (computing) , telecommunications , algorithm
Currently in the real-time audio applications fixed point CODEC is being used. But the major disadvantage of such CODEC is the speed and accuracy. Because , as the DSP systems cannot be operated with real-time signal ‘t’, but they can be operated with the discrete time ‘n’ , the real-time analog signal x(t) is to be converted into discrete time signal x(n) by the analog to digital convert (ADC). The most widely used ADC in the signal processing environment is sigma-delta ADC. But, it can operate with the maximum speed of 1MHz. The DSP processor can give several times more speed than sigma-delta ADC. Hence, the speed of DSP system is being limited by sigma-delta ADC, even though the DSP system has the capability to operate with great speed. Similarly, the accuracy is being missed because the floating point samples are converted into fixed point to get the compatibility with fixed point DSP processor. To eliminate these two bottlenecks the novel design methodology has been proposed in which the ADC and DAC have been eliminated and the system is developed by the 16 bit floating point.

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