Open AccessLink State Machine of PCI Express
Author(s) -
S Rachana,
Ece Dept UG student,
Sujatha Hiremath,
Ece Dept Professor
Publication year - 2020
Publication title -
international journal of engineering and advanced technology
Language(s) - English
Resource type - Journals
ISSN - 2249-8958
DOI - 10.35940/ijeat.d8478.049420
Subject(s) - pci express , computer science , link layer , data link layer , state (computer science) , ethernet , network packet , physical layer , polling , network interface controller , interface (matter) , embedded system , computer network , operating system , computer hardware , field programmable gate array , wireless , algorithm , bubble , maximum bubble pressure method
PCI Express is a high-speed serial computer expansion bus standard with advance error reporting technology. It is the common motherboard interface for personal computers' graphics cards, hard drives, SSDs, Wi-Fi and Ethernet hardware connections. A link in PCIe is the communication path between transmitter and receiver. PCIe operates in all transaction, data link and physical layer. The link bring up in physical layer is essential for the link state machine to proceed further into data transfer state. This paper analyses the Link training and status state machine for the Detect, Polling, Configuration and Recovery states. The state analysis is simulated using the TS1 and TS2 packets transfer between Root Complex and End Point.