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Impact of Threshold Voltage roll off in Ultra Thin Fully Depleted Silicon on Insulator MOSFET
Author(s) -
Chandra Shakher Tyagi,
R.L. Sharma,
Prashant Mani
Publication year - 2020
Publication title -
international journal of engineering and advanced technology
Language(s) - English
Resource type - Journals
ISSN - 2249-8958
DOI - 10.35940/ijeat.c5475.029320
Subject(s) - transconductance , threshold voltage , mosfet , materials science , silicon on insulator , optoelectronics , silicon , voltage , insulator (electricity) , thin film , electrical engineering , transistor , nanotechnology , engineering
This article is discussing about threshold voltage roll off effect in Ultra Thin Fully Depleted Silicon on Insulator MOSFET. The device performance is improved due to the reduction in threshold voltage roll off. The thickness of oxide layer is optimized to 2nm which also have a vital role in improvement of device’s throughput. The effect of oxide thickness on parasitic parameter also discussed. Device conductance and transconductance also take in account on simulating the ultra thin fully depleted SOIMOSFET.

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