Open AccessDesign 10-Transistor (10t) Sram using Finfet Technology
Author(s) -
Jyoti Verma*,
Abhiruchi Passi,
Savita Sindhu,
S. Gayathiri
Publication year - 2019
Publication title -
international journal of engineering and advanced technology
Language(s) - English
Resource type - Journals
ISSN - 2249-8958
DOI - 10.35940/ijeat.a9690.109119
Subject(s) - static random access memory , mosfet , transistor , short channel effect , electronic engineering , field effect transistor , channel (broadcasting) , cmos , electrical engineering , computer science , engineering , voltage
This paper discuss designing of low power, high-speed 10-Transistor (10T) SRAM and analysis of SRAM cell in Metal Oxide Semiconductor Field Effect Transistor (MOSFET) and FinFET technology. MOSFET is used widely in many areas, but below 40 nm technology control of channel region becomes extremely difficult. So there is a necessity for new innovative technology which allows designers to design below 40nm technology and can offer excellent control over gate thus reducing short channel effects. The designing of SRAM is analyzed using TANNER EDA tool and Microwind.