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GaN-on-silicon transistors with reduced current collapse and improved blocking voltage by means of local substrate removal
Author(s) -
Idriss Abid,
E. Canato,
Matteo Meneghini,
Gaudenzio Meneghesso,
Kai Cheng,
Farid Medjdoub
Publication year - 2021
Publication title -
applied physics express
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.911
H-Index - 94
eISSN - 1882-0786
pISSN - 1882-0778
DOI - 10.35848/1882-0786/abdca0
Subject(s) - materials science , trapping , substrate (aquarium) , silicon , optoelectronics , transistor , nucleation , layer (electronics) , hysteresis , voltage , nanotechnology , electrical engineering , chemistry , condensed matter physics , ecology , oceanography , physics , engineering , organic chemistry , biology , geology
We report on the demonstration of low trapping effects above 1200 V of GaN-on-silicon transistors using a local substrate removal (LSR) followed by a thick backside ultra-wide-bandgap AlN deposition. Substrate ramp measurements show reduced hysteresis up to 3000 V. It has been found that the LSR approach not only enables the extension operation voltage capabilities of GaN-on-silicon HEMTs with low on-resistance but also allow for the reduction of trapping effects directly affecting their dynamic behavior. This work points out that a large part of the electron trapping under high bias occurs at the AlN nucleation layer and Si substrate interface.

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