Open AccessAnalysis of threshold voltage instabilities in semi-vertical GaN-on-Si FETs
Author(s) -
Kalparupa Mukherjee,
Matteo Borga,
Maria Ruzzarin,
Carlo De Santi,
Steve Stoffels,
Shuzhen You,
Karen Geens,
Hongbin Liang,
Stefaan Decoutere,
Gaudenzio Meneghesso,
Enrico Zai,
Matteo Meneghini
Publication year - 2020
Publication title -
applied physics express
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.911
H-Index - 94
eISSN - 1882-0786
pISSN - 1882-0778
DOI - 10.35848/1882-0786/ab6ddd
Subject(s) - trapping , threshold voltage , materials science , optoelectronics , trench , stress (linguistics) , insulator (electricity) , transistor , wavelength , shallow trench isolation , silicon on insulator , voltage , transient (computer programming) , silicon , nanotechnology , physics , layer (electronics) , ecology , linguistics , philosophy , quantum mechanics , computer science , biology , operating system
We present a first study of threshold voltage instabilities of semi-vertical GaN-on-Si trench-MOSFETs, based on double pulsed, threshold voltage transient, and UV-assisted C – V analysis. Under positive gate stress, small negative V th shifts (low stress) and a positive V th shifts (high stress) are observed, ascribed to trapping within the insulator and at the metal/insulator interface. Trapping effects are eliminated through exposure to UV light; wavelength-dependent analysis extracts the threshold de-trapping energy ≈2.95 eV. UV-assisted CV measurements describe the distribution of states at the GaN/Al 2 O 3 interface. The described methodology provides an understanding and assessment of trapping mechanisms in vertical GaN transistors.