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Fabrication of silicon on insulator wafer with silicon carbide insulator layer by surface-activated bonding at room temperature
Author(s) -
Yoshio Koga,
Kazunari Kurita
Publication year - 2020
Publication title -
japanese journal of applied physics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.487
H-Index - 129
eISSN - 1347-4065
pISSN - 0021-4922
DOI - 10.35848/1347-4065/ab82af
Subject(s) - silicon on insulator , materials science , wafer , silicon carbide , fabrication , optoelectronics , wafer bonding , silicon , layer (electronics) , insulator (electricity) , thermal conductivity , locos , chemical vapor deposition , composite material , silicon nitride , medicine , alternative medicine , pathology
We propose a process for the fabrication of a silicon-on-insulator (SOI) wafer with a silicon carbide (SiC) insulator layer by combining plasma-enhanced chemical vapor deposition and surface-activated bonding without thermal stress to obtain sufficient thermal conductivity for self-heating power and high-frequency device applications. The thermal conductivity of the deposited SiC layer is twice that of a silicon dioxide (SiO 2 ) layer, and the breakdown electric field of this layer is 10–11 MV cm −1 , the same as that of a SiO 2 layer. In addition, the bonding interface between the silicon layer and the deposited SiC insulator layer has no voids or punch-out dislocations. Therefore, the SOI wafer with a SiC layer has high thermal conductivity and breakdown electric field; this SOI wafer and its fabrication process will be important for the realization of next-generation self-heating devices such as power and high-frequency devices.

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