POWER RECYCLE USING POSITIVE FEEDBACK ADIABATIC SYSTEM

Power consumption has become a crucial style criterion for integrated circuits. Adiabatic circuit designs consist of deliberated as well as originate with effectual at achieving minimum power on the VLSI circuit. In manuscript summarizes and suggests a novel adiabatic logic circuit depend on logic family PFAL. In the manuscript also goals to compare efficiency of established adiabatic logic circuit, based on power indulgence, and another families of adiabatic logic with bi-passing leakage energy through the capacitance based switching circuit using adiabatic ECAL logic. The recycled discrete levels of voltage are used to enable other embedded circuit that acts as common platform for all embedded modules. The comparative results are presented in various frequencies that show the lowest power dissipation of established logic circuit. PFAL contribute the better method to invert the energy store in output node capacitance rather than discharge it through ground node. Keywords—adiabatic, ECAL adiabatic logic, FPGA, low power, VLSI, PFAL, VLSI circuit