Modeling of Static Negative Bias Temperature Stressing in p-channel VDMOSFETs using Least Square Method | Zendy

Nikola Mitrović | Zendy; Danijel Danković | Zendy; Branislav Ranđelović | Zendy; Zoran Prijić | Zendy; N. Stojadinović | Zendy

AI Assistant Blog Pricing

Home ZAIA Blog

Open Access

Modeling of Static Negative Bias Temperature Stressing in p-channel VDMOSFETs using Least Square Method

Author(s) -

Nikola Mitrović,

Danijel Danković,

Branislav Ranđelović,

Zoran Prijić,

N. Stojadinović

Publication year - 2020

Publication title -

informacije midem - journal of microelectronics electronic components and materials

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.122

H-Index - 18

eISSN - 1855-4709

pISSN - 0352-9045

DOI - 10.33180/infmidem2020.305

Subject(s) - negative bias temperature instability , threshold voltage , materials science , electronic circuit , square (algebra) , voltage , channel (broadcasting) , stress (linguistics) , biasing , oxide , power (physics) , equivalent circuit , condensed matter physics , electronic engineering , electrical engineering , physics , thermodynamics , engineering , mathematics , transistor , linguistics , philosophy , geometry , metallurgy

The content you want is available to Zendy users.

Already have an account? Click here to sign in.

Having issues? You can contact us here

Accelerating Research