z-logo
open-access-imgOpen Access
The Effect of Latency Increasing on the Realisation Cost in High Level Synthesis of Pipeline Systems
Author(s) -
György Pilászy,
György Rácz,
Péter Arató
Publication year - 2014
Publication title -
periodica polytechnica electrical engineering and computer science
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.158
H-Index - 13
eISSN - 2064-5279
pISSN - 2064-5260
DOI - 10.3311/ppee.7024
Subject(s) - latency (audio) , scheduling (production processes) , computer science , pipeline (software) , realisation , high level synthesis , real time computing , embedded system , engineering , field programmable gate array , telecommunications , operations management , operating system , physics , quantum mechanics

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here
Accelerating Research

Address

John Eccles House
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom