МЕТОД РАЗРАБОТКИ МУЛЬТИПАРАМЕТРИЗИРУЕМЫХ ПРОЕКТОВ ПРОГРАММИРУЕМОЙ ЛОГИКИ

A classification of project flexibility ways provided in VHDL language is proposed. The results of the analysis of the dependence of the FPGA resources required for the implementation of arithmetic blocks are presented. The peculiarities of implementation of FPGA arithmetic operations with a fixed point are analyzed. The analytical ratios of the of logical elements number for the Altera FPGA from the input data width of the arithmetic blocks are given. The results of an experimental study of the dependence of required FPGA resources amount for parametrizable arithmetic blocks implementation are given. It is demonstrated that in case if build-in hardware-implemented multipliers are available, the required FPGA resources amount for integer multiplier implementation changes with abrupt shape with adding one additional bit to input data width. Definitions of static parametrization, through parameterization and multiparametrization of FPGA projects are given. The ways of wide-parameterizable FPGA projects development are discussed. It is recommended to use parameterization to maximize the efficiency of FPGA resources usage. The technique of multiparametrized FPGA-based projects development is proposed. The technique of evaluating of the required FPGA resources amount for implementation of a multiparametrized project is proposed. A practical example of the use of the described method of multiparametrized FPGA-based projects development is proposed. The example includes the FPGA implementation of multiply-accumulate operations