Open AccessDesign and simulation of PCI Express physical layer
Author(s) -
Linh Thi Le Nguyen,
Nhan Nguyen,
Dong An Bui,
Hieu V. Nguyen
Publication year - 2015
Publication title -
khoa học công nghệ
Language(s) - English
Resource type - Journals
ISSN - 1859-0128
DOI - 10.32508/stdj.v18i3.826
Subject(s) - physical layer , correctness , computer science , verilog , layer (electronics) , data link layer , link layer , physical design , function (biology) , conventional pci , computer architecture , embedded system , field programmable gate array , circuit design , programming language , operating system , materials science , psychology , composite material , evolutionary biology , psychiatry , myocardial infarction , wireless , biology
This paper presents a detailed analysis, design and simulation of PCI Express Physical Layer. The Physical Layer isolates the Transaction and Data Link Layers from the signaling technology used for Link data interchange. The Physical Layer is divided into the logical and electrical subblocks. The paper designed Physical Layer in the system level with top-down design method and wrote the Verilog HDL codes to implement Physical Layer. Wrote testbench to verify the correctness of the design module for function simulation. The simulation results show that the designed Physical Layer meets the required of the function of PCI Express™ Physical layer Base Specification Revision 2.0.