Open AccessMETHOD FOR IMPLEMENTING ASYNCHRONOUS CIRCUITS ON FPGA
Author(s) -
Vu Duc Anh Dinh
Publication year - 2011
Publication title -
khoa học công nghệ
Language(s) - English
Resource type - Journals
ISSN - 1859-0128
DOI - 10.32508/stdj.v14i4.2004
Subject(s) - asynchronous communication , field programmable gate array , computer science , lookup table , asynchronous circuit , electronic circuit , digital electronics , asynchronous system , computer architecture , embedded system , computer hardware , table (database) , synchronous circuit , engineering , electrical engineering , computer network , clock signal , telecommunications , operating system , jitter , data mining
FPGA device is a dominant implementation medium for digital circuits. Unfortunately, they do not support asynchronous circuits because of the lack of asynchronous circuit elements such as Muller gates, etc. In this paper, new efficient approaches are proposed to prototype asynchronous circuits on Look-Up Table-based (LUT) FPGA rapidly. The developed techniques are based on building of elements which play an important role in asynchronous circuits. The hazard-free elements are predefined in libraries in HDL and EDIF format. Timing and/or area constraints for place&route tool are automatically generated to map the asynchronous elements on suitable FPGA’s logic blocks. Several FPGA devices such as Altera, Xilinx and Actel could be used as target for the implementation.