Open AccessA Low Power, Leakage Reduction, High Speed 8-Bit Ripple Carry TSPC Adder using MTCMOS Dynamic Logic
Author(s) -
Bhukya Shankar,
Ravikanth Sivangi
Publication year - 2016
Publication title -
cvr journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 2581-7957
pISSN - 2277-3916
DOI - 10.32377/cvrjst1008
Subject(s) - adder , cmos , pass transistor logic , computer science , dynamic demand , logic gate , adiabatic circuit , transistor , electronic engineering , dissipation , pull up resistor , logic family , reduction (mathematics) , electrical engineering , logic synthesis , power (physics) , embedded system , engineering , voltage , physics , mathematics , geometry , quantum mechanics , thermodynamics
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