
Efficient Place and Routing CAD Techniques for the Reduction of Power Dissipation in FPGAs
Author(s) -
M.V. Sushumna
Publication year - 2016
Publication title -
cvr journal of science and technology/cvr journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 2581-7957
pISSN - 2277-3916
DOI - 10.32377/cvrjst1004
Subject(s) - reduction (mathematics) , dissipation , routing (electronic design automation) , cad , power (physics) , field programmable gate array , computer science , computer architecture , parallel computing , embedded system , engineering , mathematics , engineering drawing , physics , geometry , quantum mechanics , thermodynamics