Open AccessDesign of Fast Locking ADPLL via FFC Technique using VHDL-AMS
Author(s) -
R. Bhavani
Publication year - 2016
Publication title -
cvr journal of science and technology/cvr journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 2581-7957
pISSN - 2277-3916
DOI - 10.32377/cvrjst1003
Subject(s) - vhdl ams , vhdl , computer science , embedded system , field programmable gate array , hardware description language