Open AccessDesign of Sub-Threshold Source Coupled Logic Families for Low Power Applications
Author(s) -
Jyotsna K.A.,
Satish Kumar P.,
Madhavi B.K.
Publication year - 2016
Publication title -
cvr journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 2581-7957
pISSN - 2277-3916
DOI - 10.32377/cvrjst1001
Subject(s) - cadence , logic gate , pass transistor logic , power (physics) , computer science , logic family , logic level , electronic engineering , arithmetic logic unit , logic synthesis , digital electronics , electrical engineering , computer hardware , engineering , electronic circuit , physics , quantum mechanics
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