Open AccessOptimization and Effective analysis of Full Adder Circuit Design in 45nm Technology
Author(s) -
B. J. Singh
Publication year - 2015
Publication title -
cvr journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 2581-7957
pISSN - 2277-3916
DOI - 10.32377/cvrjst0915
Subject(s) - adder , multiplexer , xor gate , serial binary adder , electronic engineering , computer science , power–delay product , cmos , pass transistor logic , transistor , electronic circuit , noise margin , transistor count , logic gate , electrical engineering , digital electronics , engineering , voltage , multiplexing
Accelerating Research
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom
Address
John Eccles HouseRobert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom