Open AccessHazards and Glitch Power Reduction of CMOS Full Adder in 90nm Technology
Author(s) -
B. J. Singh
Publication year - 2014
Publication title -
cvr journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 2581-7957
pISSN - 2277-3916
DOI - 10.32377/cvrjst0607
Subject(s) - cmos , glitch , dynamic demand , electronic engineering , cadence , computer science , adder , power analysis , leakage power , electronic circuit , power (physics) , electrical engineering , engineering , transistor , voltage , physics , quantum mechanics , computer security , cryptography
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