Design of On-Chip Testing Memory for High Speed Circuits
Author(s) -
M.V. Sushumna
Publication year - 2014
Publication title -
cvr journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 2581-7957
pISSN - 2277-3916
DOI - 10.32377/cvrjst0606
Subject(s) - computer science , chip , cmos , computer hardware , electronic engineering , cadence , block (permutation group theory) , electronic circuit , semiconductor memory , embedded system , electrical engineering , engineering , telecommunications , geometry , mathematics
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