Design of Static Random Access Memory for Minimum Leakage using MTCMOS Technique
Author(s) -
T. Esther Rani,
Rameshwar Rao
Publication year - 2013
Publication title -
cvr journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 2581-7957
pISSN - 2277-3916
DOI - 10.32377/cvrjst0409
Subject(s) - pmos logic , nmos logic , static random access memory , transistor , leakage power , cmos , leakage (economics) , computer science , sleep mode , power (physics) , electronic engineering , electrical engineering , engineering , voltage , power consumption , physics , economics , macroeconomics , quantum mechanics
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