
Design and Analysis of a Low-Power 8-Bit 500 KS/S SAR ADC for Bio-Medical Implant Devices
Author(s) -
Ehsan Mazidi
Publication year - 2019
Language(s) - English
Resource type - Dissertations/theses
DOI - 10.31979/etd.tq8n-42kd
Subject(s) - comparator , successive approximation adc , computer science , cmos , sampling (signal processing) , verilog , power consumption , analog to digital converter , power (physics) , electronic engineering , computer hardware , electrical engineering , engineering , field programmable gate array , detector , telecommunications , voltage , physics , quantum mechanics