Open AccessAn evaluation of multiple branch predictor and trace cache advanced fetch unit designs for dynamically scheduled superscalar processors
Author(s) -
Slade Maurer
Publication year - 2004
Language(s) - English
Resource type - Dissertations/theses
DOI - 10.31390/gradschool_theses.335
Subject(s) - branch predictor , computer science , fetch , parallel computing , instructions per cycle , cache , suite , bottleneck , speculative execution , block (permutation group theory) , trace (psycholinguistics) , cpu cache , spec# , block size , embedded system , operating system , key (lock) , central processing unit , mathematics , programming language , philosophy , geometry , linguistics , oceanography , archaeology , history , geology
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