Open AccessAn evaluation of multiple branch predictor and trace cache advanced fetch unit designs for dynamically scheduled superscalar processors
Author(s) -
Slade S Maurer
Publication year - 2022
Language(s) - English
Resource type - Dissertations/theses
DOI - 10.31390/gradschool_theses.335
Subject(s) - branch predictor , fetch , computer science , parallel computing , cache , instructions per cycle , suite , speculative execution , bottleneck , cpu cache , trace (psycholinguistics) , block (permutation group theory) , block size , operating system , embedded system , key (lock) , central processing unit , mathematics , philosophy , geometry , archaeology , history , geology , linguistics , oceanography