Open AccessPhase Noise Analyses and Measurements in the Hybrid Memristor-CMOS Phase-Locked Loop Design and Devices Beyond Bulk CMOS
Author(s) -
Naheem Olakunle Adesina
Publication year - 2022
Language(s) - English
Resource type - Dissertations/theses
DOI - 10.31390/gradschool_dissertations.5771
Subject(s) - phase locked loop , cmos , jitter , electronic engineering , phase noise , pll multibit , transistor , electronic circuit , chalcogenide , memristor , engineering , electrical engineering , materials science , optoelectronics , voltage