Open AccessArchitectural Enhancement of Processor with 8 Bit Multiplier and 16 Bit Co-operative ALU using VHDL
Author(s) -
Tanaji M. Dudhane
Publication year - 2020
Publication title -
international journal of emerging trends in engineering research
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.218
H-Index - 14
ISSN - 2347-3983
DOI - 10.30534/ijeter/2020/15872020
Subject(s) - vhdl , bit (key) , multiplier (economics) , computer science , 16 bit , arithmetic , computer architecture , 32 bit , 8 bit , parallel computing , computer hardware , field programmable gate array , mathematics , computer security , economics , macroeconomics