Open Access
Parallelized Radix-4 Scalable Montgomery Multipliers
Author(s) -
Nathaniel Pinckney,
David Harris
Publication year - 2020
Publication title -
jics. journal of integrated circuits and systems
Language(s) - English
Resource type - Journals
eISSN - 1872-0234
pISSN - 1807-1953
DOI - 10.29292/jics.v3i1.280
Subject(s) - modular exponentiation , computer science , arithmetic , parallel computing , exponentiation , multiplexer , adder , scalability , carry (investment) , radix (gastropod) , latency (audio) , multiplier (economics) , critical path method , modular design , computer hardware , mathematics , multiplexing , encryption , public key cryptography , operating system , engineering , mathematical analysis , telecommunications , botany , macroeconomics , systems engineering , finance , economics , biology
This paper describes a parallelized radix-4 scalable Montgomery multiplier implementation. The design does not require hardware multipliers, and uses parallelized multiplication to shorten the critical path. By left-shifting the sources rather than right-shifting the result, the latency between processing elements is shortened from two cycles to nearly one. Multiplexers are used to select precomputed products. Carry-save adders propagate carry bits before words are discarded. The new design can perform 1024-bit modular exponentiation in 9.4 ms and 256-bit exponentiation in 0.38 ms using 4997 Virtex2 4-input lookup tables, while consuming 30% fewer LUTs than a previous parallelized radix-4 design. This is comparable to radix-2 for long multiplies and nearly twice as fast for short ones.